Hitag S 2048 2mm x 12mm Glass Tags

Hitag S

Hitag S, by NXP Semiconductor, is targeted at the high volume livestock tracking and food safety market, it features an innovative ultra low power design specifically designed to provide for the longer reading ranges required in this application area.

It is the third chip in the Hitag series, which also includes the Hitag 1 and Hitag 2. It's notable features include read/write memory, 48 bit encryption, and collision resolution (for reading multiple tags at once).

Download the Hitag S Data Sheet for protocol, configuration, and memory layout information.

Specifications

Chip Type

Hitag S 2048; read/write

* test conditions

Physical

Frequency

125 kHz

Diameter

2.0 mm +/- 0.15mm

Length

12.0 mm +/0 0.4mm

Weight

95mg

Material

BioGlass 8625

Color

Transparent

Electrical

Operating Frequency

125 kHz +/- 6 kHz

* At room temperature

Chemical

Water Immersion IP68

20 deg C, 24h, 1m

Aqueous solution of salts

20 deg C, 100h

Alcohol, oil, HLC (10%)

20 deg C, 100h

Ammoniac

20 deg C, 100h

Mechanical

Vibration

IEC 68.2.6

6g, 14...200Hz

Shock

IEC 68.2.29

30g, 18ms, 3 axis, 1084 times/axis

Thermal

Storage:

-40 to +90 Degrees C

1 x 1000h

+120 Degrees C

1 x 100 h

Operating:

-40 to +85 Degrees C

Configuration and Memory Layout

This information is contained in the Hitag S data sheet (above), but is possibly a little disparate and cryptic. Many thanks to Joe Wooller for helping piece this together. The Hitag S chip's memory is laid out in a series of blocks; each block contains 4 pages, and each page has 4 bytes.

Page 00 contains the chip's 4-byte UID, which is programmed at manufacture time and read-only.

Page 01 contains 1 reserve byte, and 3 configuration bytes. Some of the configuration is read-only, and some of the configuration can only be programmed once - so it's important to understand the configuration layout and settings before you do anything with your chips. Page one has four bytes, laid out as follows:

Byte 3

Byte 2

Byte 1

Byte 0

Reserved

CON 2

CON 1

CON 0

CON 0 is arranged as follows:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

MEMT1

MEMT0

Where "MEMT_1 MEMT_0" is "00" for a 32 bit chip, "01" for a 256 bit chip, or "10" for a 2048 bit chip.

CON 1 is arranged as follows:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

AUT

TTFD

TTFDR1

TTFDR0

TTFM1

TTFM0

LCON

LKP

Where:

Bit Name

Explanation

AUT

Is 0 for "plain" mode and 1 for "authentication" mode

TTFD

Determines the encoding used during Transponder Talks First (TTF) communication: 0 for Manchester, 1 for BiPhase encoding

TTFDR1 TTFDR0

Determines the data rate used during TTF communication. "00" for 4 kBits, "01" for 8 kBit, "10" for 2 kBit, and "11" for 2 kBit w/ pigeon race standard

TTFM1 TTFM0

Determines the pages read during TTF communication. "00" to disable TTF mode (ie RTF), "01" for Page4-Page5, "10" for Page4-Page7, and "11" for Page 4

LCON

Important: LCON is One-Time-Programmable, meaning once it's set, it's set! So be careful with it. Set it to "0" to leave the configuration page in read/write mode. If you set it to "1" then this configuration byte (CON1) is read-only, and CON2 becomes One-Time-Programmable as well. You will be unable to change this bit once it's set.

LKP

Access rights key and password settings. "0" for "read/write" and "1" for read-only in plain mode or no-access in authentication mode (see AUT bit)

CON 2 is arranged as follows:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LCK7

LCK6

LCK5

LCK4

LCK3

LCK2

LCK1

LCK0

Where the LCK x bit locks various page ranges throughout the memory map. See page 20 in the data sheet for details... The important thing here is that each of these bits is One-Time-Programmable if LCON in CON1 is "1", and R/W if LCON in CON1 is "0".

Where To Buy

There are several places where you can purchase these chips online. I purchased mine from Brett at Sleep All Day for $10 + $2.00 shipping.


CategoryRFIDTags

Hitag S 2048 (last edited 2010-04-17 02:43:18 by TimFanelli)